Freescale Semiconductor /MKL28T7_CORE1 /LPSPI1 /CFGR0

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Interpret as CFGR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)HREN 0 (0)HRPOL 0 (0)HRSEL 0 (0)CIRFIFO 0 (0)RDMO

RDMO=0, CIRFIFO=0, HREN=0, HRSEL=0, HRPOL=0

Description

Configuration Register 0

Fields

HREN

Host Request Enable

0 (0): Host request is disabled.

1 (1): Host request is enabled.

HRPOL

Host Request Polarity

0 (0): Active low.

1 (1): Active high.

HRSEL

Host Request Select

0 (0): Host request input is pin LPSPI_HREQ.

1 (1): Host request input is input trigger.

CIRFIFO

Circular FIFO Enable

0 (0): Circular FIFO is disabled.

1 (1): Circular FIFO is enabled.

RDMO

Receive Data Match Only

0 (0): Received data is stored in the receive FIFO as normal.

1 (1): Received data is discarded unless the DMF is set.

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